maybe I will I'm creating a virtual wire to the FPGA but I'm a bit stuck at the information I have to send to the FPGA. I get the data returned from the Decred node. example: data:00000000442cc8cddfd4f8fb09cb78f540a9a08266f7735817af225c608bca200000000068b7d7a5c8dd5ad96ff4908cbff58a7aaec8f9d345970b2a0d65e7fe55685414c3ed7b685cfc657bb90bcdd451dccff4e3b9defd2bbe7902a4da014c03d3fe69010072a1fe51749405000000a22600006d11361c543ccc3e000000005e3c000074080000a179c85628d4751d3c5b31800616290c020000000000000000000000000000000000000000000000000000008000000100000000000005a0 It's then devided and reversed: 0cdc82c44fbf8d4dff578cb0982a0a9405873f7665c22af1720ca8b600a5d7b768d95addc88c90f46f7a8af5bfd3f9c8ae2a0b9745fee7650d14546855687bedc37b65fc5cd4cd0bb9f4cfdc51fddeb9e3279be2b4c01daa469fed303a1720001947451fe526a21c36116d3ecc3c5403c5e87456c879a128d4751d80315b3cc2916062000000 Should I sent this back to the FPGA or compress it first? Probably both are possible but of course looking for the faster option Wolf still working on your code?
First, you'll want to get midstate from the hashing of the first 128 bytes of the data. Then you pass the midstate and however many bytes (at least 12) you want to process in the fpga.
Hi, @sprocket do you have some kind of unittest for the Spartan6 fpga ? a very simple python code to send data to the fpga and validate answer ? Regards, Loux
Can you provide more details on what you are trying to do? It really depends on what fpga you are using as to how you test it (i.e. ztex uses a custom api, others use serial comms). I used to have some python scripts to test that I could communicate with serial fpgas, but right now I just use a miner to test by hard coding values for the block header.
Hi @sprocket, i've got an avnet microboard spartan-6 LX9. I used your work from https://github.com/sprocket-fpga/Decred_LX9. Now i would like to test it by sending a value (from Ubuntu) to the board and check the answer.
Hi, i just need a quick test to see if my fpga is working, a two line code with python + pyserial to send bytes (b'0'*512 for example) to the fpga and read answer ? For now I'm blocked on the read from the PC/python side.
@sprocket Hi, I fixed my issue (wrong constraint) and now i can write/read on the serial port to talk to the FPGA. Do we have some specifications of input / output ? I see we need to write 44 bytes to the fpga, what is it expecting, what is the output ? Thanks
@sprocket, Hi i really need your help. I've upload the bitstream to the spartan 6 and start your modified cgminer. I've got a lot of HW error. The code of the bitstream is from https://github.com/sprocket-fpga/Decred_LX9 (no changes). Regards, [2017-05-18 07:44:00] Attemping to Reopen Serial FPGA on /dev/ttyUSB0 [2017-05-18 07:44:00] SRL0: Nonce Found - 14EAC054 ( 1.0Mhz) [2017-05-18 07:44:00] SRL0: invalid nonce - HW error ... 2017-05-18 07:44:00] Attemping to Reopen Serial FPGA on /dev/ttyUSB0 [2017-05-18 07:44:00] SRL0: Nonce Found - 14EAC054 ( 1.0Mhz) [2017-05-18 07:44:00] SRL0: invalid nonce - HW error [2017-05-18 07:44:00] SRL0: Nonce Found - D248400F ( 1.0Mhz) [2017-05-18 07:44:00] SRL0: invalid nonce - HW error [2017-05-18 07:44:00] SRL0: Nonce Found - C8A50640 ( 1.0Mhz) [2017-05-18 07:44:00] SRL0: invalid nonce - HW error