So Someone Told Me You Can't Fit 14 Round Blake-256 On A Mojo V3...

Discussion in 'Technical Development' started by Wolf, Feb 19, 2016.

  1. 2017/12/15 - Decred v1.1.2 released! → Release Notes  → Downloads
  1. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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    #1 Wolf, Feb 19, 2016
    Last edited: Feb 20, 2016
    So I did. It successfully hashes, incrementing a nonce (starting from zero) until it reaches a hash below a target (which is currently fixed in the design) and returns the 32-bit nonce that resulted in the hash below the target.

    I optimized as best I could for speed given the brutal constraints on the LX9. I kept the stock clock of 50Mhz, but only just - without setting ISE to optimize for timing performance, it won't meet the timing constraints. I've been playing with the design, cleaning it up and such, but it usually occupies around the high 80% to low 90% of slices on the LX9.

    I don't have solid hashrate numbers as of yet for two reasons: One, diff1 is a little high for it, and would take a while to find one share, and two, I have some sort of I/O related bug. It accepts work sometimes, but other times returns an invalid nonce. I used a test program which runs Blake-256 14 round on the CPU to verify the results - they're usually right, but there's still something wrong in my I/O design.

    Anyways, point made - you CAN fit it on super small, cheap FPGAs.

    EDIT: FIXED! Now, only one issue with gauging hashrate - any timer I use would either have to include the time spent passing the data over USB serial and getting the nonce back over the same, or exclude it and run the risk of estimating a little high.

    EDIT2: I tried benchmarking with and without the actual send over USB serial counted, and it seems to have an extremely small, if any, effect. Hashrate seems to be 0.82MH/s - 0.85MH/s. Power use is as yet unknown - it's powered over USB.

    EDIT3: Oops. Apparently, I was mining at diff1 for Decred this whole time. I thought the target was 0x00000000 - but it's 0x000000FF.
     
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  2. jyap

    jyap New Member

    Feb 18, 2016
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    Nice. What's the power draw on the FPGA? I'd be interested in running this since running GPU's is too expensive for me.
     
  3. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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    All my power meters go between the device and the wall - the Mojo v3 is powered by USB. However, we can get an estimate of the maximum possible draw from the USB 2.0 specification - 5V at .5A. This means 2.5W can be drawn, maximum, by the Mojo v3. Efficiency would rise a whole lot with better chips, though.
     
  4. h3rtl31n

    h3rtl31n New Member
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    Dec 28, 2015
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    How many MH/s do you get out of it ? :)
     
  5. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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    Did you even read the first post?
     
  6. Jamie Keefer

    Jamie Keefer New Member
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    Jan 16, 2016
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  7. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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  8. sprocket

    sprocket New Member

    Feb 20, 2016
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    Wolf, good job. My ztex 1.15y is getting around 800 MH/s. It took about 16K slices to build so I would think you may be able to get your mojo to 50MH/s.
     
  9. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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    The ZTEX 1.15y is 4 LX150 chips, and while that design uses 16k slices, mine uses a hair over 1.3k. With this kind of constraint, the design options are limited, which is why the hashrate is so low in comparison. Hashrate isn't necessarily a function of slice count.
     
  10. sprocket

    sprocket New Member

    Feb 20, 2016
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    Good point (I forgot to take into account the ztex has 4 chips). Well, I was hoping that your mojo would be able to produce a bit higher, but I understand the limitations.
     
  11. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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    It was done simply because I was told it couldn't be. I never expected it to be profitable, nor do I care. My real implementation will be done on a far better Cyclone V.
     
  12. kkmk

    kkmk New Member

    Feb 11, 2016
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    Hi guys. Let^s say I^m a noob so please bear with me :)
    Wolf I^ve been watching you here in forum and in other forums and you are a guy who defenitly knows what he is doing.
    That^s why I^ve decide to write here and ask for your opinion and of course, for your help.
    I^live in Germany and here the prices for electrycity are way to high (0,28 Euro cent /Kwh) .
    So I was thinking i could use the FPGA modules to mine .....
    Le^t^s say i really know only the basics in implementation and code writing and building.

    Only to learn and test :

    I was thinking to use this one : http://shop.ztex.de/product_info.php?products_id=83&osCsid=vlk4thj99t5qpqthq2gru0d9o1

    How many MH/S do you think it will come out ? After my calculation it will be arround 450 MH/s. Please correct me if i^m wrong.

    with https://github.com/kramble/FPGA-Blakecoin-Miner .

    But i need to fork that blakecoin miner from 8 rounds to 14 Rounds for decred.

    I^m a good learner if you or anybody else points me in the right direction. Of course it will not be for free , i understand that :)

    For you help i^m deeply grateful.

    Best regards.
     
  13. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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    First off, you're probably paying too much for that board - second, I have no idea of the speed, because it depends on the design. If you're really interested in learning software and hardware dev, it may be a fun project for you. If you just want FPGA miners, you'll likely never complete it.
     
  14. kkmk

    kkmk New Member

    Feb 11, 2016
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    I want to learn. And of course if it is possible also FPGA miners. Why do you think i^ll never complete it. ? Is there some big hidden secret :) i must know ?
    Thanx again. :)
     
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  15. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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    Simply because it's going to be a lot of difficult work - it'll take plenty of time to learn, and a lot of that time, you'll feel like you're getting nowhere. If you're doing it because you enjoy the project, then I think you may succeed - but doing it just to try and make a miner is probably going to end in giving up, IMO.
     
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  16. Jamie Keefer

    Jamie Keefer New Member
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    Jan 16, 2016
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    I thought for sure I saw somewhere that said the zeus chips they have are fpgas, but I can not find it now.

    Thank you for you reply though.
     
  17. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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    In preparation for porting the old serial Icarus protocol back into CGMiner and modifying it for use with Decred, I've finalized a piece I left out while testing - the XOR with the original input done on the output of the Blake-256 block transform - and worked on the design some more, including using a new protocol that's more Icarus-like. Ported my tests over to this version, v0.3, as well.

    Previously, slice usage was ~1,300 out of the LX9's 1,430. Dropped it to 1,205 in this latest synthesis, but that isn't yet enough free logic to allow me to speed it up yet, I don't think.

    Test results (NSFW): https://ottrbutt.com/tmp/decredwolf-mojo-success-v0.3.png
     
  18. Wolf

    Wolf Jr. Member

    Jan 25, 2016
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